IC Design Forum Abstract

Title: Successful Implementation of Schematic Driven Layout Methodology at TDK Semiconductor
Author: Jon Thayer

Abstract:
In order to gain the advantages of using Schematic Driven Layout tools to guide our Analog Layout team, a number of problems had to be solved. Interfaces between the schematic and layout databases needed to be defined and differences resolved. System setup requirements had to be identified and implemented in an automated fashion. Filter functions needed to be written, and device generators refined for use with the methodology. Additionally, a number of ample functions were written to automate several specialized analog requirements not available in the standard Mentor device generators.

After a short training session for each user, immediate benefits were realized. Placement of devices was very fast, with absolute accuracy. With the use of flylines and cross-probing, intelligent placement of components was simplified. Errors in first pass hookup of analog sections was greatly reduced, especially with more junior designers. Top-down planning of port placement between sections now aids in critical signal flow planning. In addition, interactive and automated routing tools are now at our disposal to aid in upper-level hookup of blocks.

Bio:
Jon Thayer has more than 23 years experience in CAD design for all types of electronic products, include Mixed-signal ICs, ultra-high density and high speed PCBs, MCMs, co-fired ceramic packaging, and flex circuits. Founder of 2 CAD design companies and an IPC certified interconnect designer, he is currently a Senior Mask Design Engineer with TDK Semiconductor in Nevada City, California. His duties include project management of IC designs, analog and digital layout, advanced packaging design, and support of automated layout and verification tools.