IC Design Forum Abstract

Title: Case Study: Partnering For Effective Ruledeck
Author: Mike Fliesler

Abstract:
This is a case study of an effective use of AMD and EDA partner resources to create a new verification ruledeck for a new technology.

Mentor Consulting Division (MCD) undertook to audit our existing DRC ruledeck, write DRC code for specific rules, and supervise AMD layout of the QA test suite. This job started in late June, and was completed in late October 2000. Technology development, chip design, and CAD were highly concurrent. The scope of this job increased dramatically, due to multiple late-cycle design-rule revisions by the AMD NVT Group. Two revisions were done in the last two weeks before tape out of our lead product!

The key success factors were: careful and complete definition of scope of work; effective use of AMD and MGC expertise; modular code development; disciplined project tracking; and co-development of a QA layout test suite. AMD Design, CAD, and NVT engineers worked effectively with MCD consultants, to write effective code and weed out false error flags. Note that this technology includes over 24 different transistor and component types! AMD's control of the layout QA test suite was critical to effective ruledeck checking and revision control.

At tapeout, MCD consultants also helped AMD to implement multiprocessor "Turbo" Calibre, (HLVS, HDRC) on our compute farm. This dramatically reduced our full chip HDRC run times, from 4 hours to under 40 minutes.

Finally, Mentor was able to code several rules that had not been attempted before by NVD, due to the complexity of the checks required. This cost-effective partnership led to a high-coverage verification test suite, in optimal time. The modular code and QA test suite are readily portable to successive generations of AMD NV technology.

Bio:
Mike Fliesler is Director of Engineering Services in the Flash Memory Design group at AMD. He has over 20 years experience in the semiconductor industry. He received the BSEE and MSEE degrees from Stanford University. He holds two patents and has published three papers.