This presentation will cover the steps necessary to use Model Technology ModelSim HDL simulator to verify board-level designs. Board simulation using HDL simulators has been difficult because board schematic capture tools are not targeted to output HDL netlists. Cadence now has the Concept-HDL product that is designed to output HDL netlists from their board design environment. The setup and procedure to get ModelSim simulating Cadence board-level schematics will be detailed.

Bio

Dan Bethke is a senior applications engineer for Mentor Graphics supporting the South East USA out of Durham, North Carolina. Prior to Mentor Graphics, Dan was a hardware design engineer and supported the CAE infrastructure at AlliedSignal Aerospace in Towson, Maryland.