In a highly competitive market such as telecom systems, decreasing design time has become a primary objective. The increasing complexity of today's mixed-signal systems has forced designers to use a top-down design methodology. Digital designers have access to efficient mature tools packaged for a flow that supports such a methodology and can swiftly switch from the highest to the lowest level of abstraction passing by well-defined levels. On the contrary, analog and mixed-signal designers trying to adopt a top-down design methodology are lacking tools that support such a flow. The large size and high complexity of many telecom mixed-signal designs cannot be simulated on the transistor level. The designer has to either fabricate the design and do measurements or try to simulate the full chip using behavioral models that include circuit implementation and process related information.

Behavioral modeling using HDLs is the proposed method for decreasing the design time of mixed-signal telecom systems using a top-down design methodology and bottom-up verification. However, there are still many obstacles limiting its wide use; considerable time is needed to develop well-optimized, generic and well-tested behavioral models. This paper shows how a library of efficient behavioral models written in mixed-signal HDL, CommLib (written in HDL-A and VHDL-AMS), developed to facilitate model reuse can dramatically decrease design time and verification allowing true top-down design and full chip verification of mixed- signal systems.

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