| Tuesday 09/28/99 1:00 - 2:30, HDL Design |
Field Programmable Gate Arrays (FPGAs) have been used to provide prototype designs prior to the availability of manufacturing-level ASICs. FPGAs also allow products to ship to customers faster than an ASIC design because there is no manufacturing fabrication process required. When a small quantity of the product is projected to be shipped to the customer, it is advantageous from a cost and schedule standpoint to use FPGAs in the design of a product.
A number of companies offer different types of FPGAs. This paper describes the important characteristics among FPGA vendors. The number of circuits, the internal FPGA speed, and cost distinguish different manufacturers. With different manufacturers promising they are better than their competition this paper describes how to investigate the different characteristics when choosing an FPGA for any design.
Different FPGA characteristics make the choice of the best FPGA vendor difficult. One manufacturer may be ideally suited to one design, but not good in another. The Quality Functional Deployment methodology allows the engineer to specify important FPGA characteristics including the VDHL, simulation and wiring tools required by a specific design. Once these characteristics are listed, they are objectively assigned a numeric importance. FPGA vendors are then numerically evaluated on how well they meet these specified characteristics. This numerical evaluation is an objective way to determine the vendor that best meets the requirements set forth by the engineering team.
Bio
Mr. Suffern is a Senior Engineer in the Service Processor area of Advanced System Management in the Personal System Group (PSG). He joined IBM in 1973 as a junior engineer, working on communication adapter design. He held numerous positions working on the architecture and system design for the IBM 3867, the channel adapter for the IBM 3725, the IBM token ring wiring system, the high performance transmission subsystem for the IBM 3745, the IBM 3746 model 900, the high-speed trunk/port adapter for the IBM 2220, and the integrated LAN Switch blades for the 8260 product family.
In 1986 he went to La Gaude, France, for three years where he worked on the development of future communication controllers. He returned to France again in 1992 to help develop the architecture and system design for the high-speed attachments to the IBM 2220 NWAYs bandwidth manager. He returned to the US in 1994 where he worked in the LAN Switching area of the Network Hardware Division of IBM. Currently, he is working on the architecture and system design of the service processor for the Advanced System Management area in PSG.
Mr. Suffern earned a B.S. degree in Electrical Engineering from North Carolina State University. He attended IBM?s System Research Institute in 1981. He is an IBM Master Inventor with eight patents filed and numerous technical disclosures published. He has also presented papers in the field of communication adapter architecture, system design, and verification.