VSIA (Virtual Socket Interface Alliance) is a group that promotes reuse of components in electronic engineering. They promote the use of layered interfaces, hiding the functionality aspect of a component and simplifying the work of constructing models. This kind of encapsulation can be represented visually in a tool like Renoir that allows capturing design specification in a graphical form. In this paper, we propose a way to merge the VSIA recommendations in an extension of Renoir, in order to produce a tool generating automatically communication unit between component. This tool could simplify the insertion of new components from a library (e.g. processors, memories and custom IP modules) during the design phase of embedded system, while masking the distinction between software and hardware components.

Bio

Yannick Henneault received the B.S. degree in computer engineering from Ecole Polytechnique de Montreal in 1998. He is also pursuing a masters degree in electrical engineering under the supervision od Messrs. Bois and Aboulhamid, where he is involved in the development of CIRCUS (Communication Interface Refinement for Co-Design Unified System) project, an experimental system for hardware/software codesign. His interests are in software engineering and hardware/software cosynthesis.