At Motorola's Communications Enterprise (CE) Plantation Florida facility, a standardized team design (concurrent engineering) process using Mentor Graphics Board Architect - LMS has been successfully piloted within several product groups. The process has been demonstrated to improve design team interaction and decrease overall Printed Circuit Board design cycle time.

Team Design (Concurrent Engineering) Process Definition: Multiple Electrical Engineers and one Printed Circuit Board designer working together (concurrently) as a product design team, using a single common design container with a hierarchically partitioned schematic.

This presentation will highlight the benefits of using Board Architect - LMS as part of a standardized team design (concurrent engineering) process at a large site with a diverse user population. Management of the design container, a high level overview the Board Architect - LMS team design process flow, and details of each step in the Printed Circuit Board design process will be discussed. Knowledge of Board Architect - LMS and viewpoints, is helpful but not required.

Bio

Craig Armenti is a Senior Staff Engineer with the Communications Enterprise (CE) Core Process Solutions Center (CPSC) located at Motorola's Plantation Florida facility. The CPSC is responsible for the development and documentation of standard concept to manufacturing core processes to be used throughout the CE. Prior to this, Craig was responsible for Board Station deployment and process support at the Plantation site. Craig has been using Mentor Graphics software for approximately nine years.

Gene Menard is also a Senior Staff Engineer with the Communications Enterprise Core Process Solutions Center located at Motorola's Plantation Florida facility. Gene has been with Motorola for 5 years providing CAE tools and library process support and has over 12 years of previous experience with EDA tools in various roles as an Applications Engineer, CAE instructor, and IC Design Engineer.