Netlists are bridges that are used to interface between schematic capture tools and downstream tools like simulators and IC Verification tools. Typically netlisters access the design database using the procedural interfaces provided by the schematic capture tool, extract the devices and connectivity information and output the information in a format that is usable by the downstream tools.

This paper describes the design and implementation of custom netlisters for Verilog and MCSpice. The netlisters are implemented in C using embedded Connectivity Data Port(CDP) calls provided by Design Architect (DA) API. A manually prepared ASCII technology file lists out any devices that need special handling. The netlisters parse the technology files, create the top-level viewpoint by invoking scripts written in AMPLE and Perl, evaluate the database through the viewpoint and then generate the connectivity information. By using the CDP calls over the other API's, we can use the capability and power of Case Frames to create re-configurable designs.

In this paper, we describe the process of generating a viewpoint from an ASCII file that has Case Frame parameters defined in it. Some ideas on controlling the netlister flow to include a module definition, ignore a module and/or ignore instances will be discussed. Finally, the benefits of this netlister implementation arising from the use of ASCII technology files for different symbol libraries are detailed.

The netlisters are in production use and will be reused for future processes with minimal changes.

Bio

Jayathi Subramanian is a Staff Engineer at Motorola Inc. She has been involved in customizing Design Architect and working on LVS and parasitic extraction for the past 5.5 years.

Sundari Kumar is a Software Eng II at Motorola Inc. She has been involoved in library development, customizing Design Architect and on DRCs for the past 5 years.