1999 Abstracts and Bios by Track

HDL Design
System On Chip
Board Design
Special Tool Focus

HDL Design

Leonardo and Renoir Software Results - An Evaluation Based on Fžbio K. Schneider and Jorge Tortato J”nior

Renoir Extension to Support a H/S CoDesign Methodology Yannick Henneault (presenter), G. Bois, M. Aboulhamid, J. Baillairge,

A General Co-Simulation Model on Seamless for Teaching H/S Co-Design G. Bois (presenter), I. Campagna, J. Baillairge

Onwards and Upwards: Teaching HDL Coding James F. Frenzel

Using ACTgen with Renoir to Quickly Create Behavioral HDL Circuit Models Mary Harris

Simulation-Oriented Behavioral Verification Bassam Tabbara (designated presenter),

Analyzing FPGA Manufacturers and Software Development Tools for Ed Suffern

Techniques to fasten time to market using ModelSim Ruturaj A. Pathak

Cross-referencing and cross highlighting between high level graphics, Paolo Spazzini

Mentor Graphics new SVC based Netlister (HDLwrite) Ashraf Hosni (Presenter).

Open Loop Analysis of Discontinuous Systems Gary L. Pratt, P.E.

Renoir's integration with ModelSim for Design Verification and Debug Ananda S. Arasu

Applying Version Control in an HDL Design Environment Peter P Davy

Optimizing VHDL, Verilog and Mixed-HDL Simulation Using ModelSim Julian Medinger

Top-Down & Bottom-Up Verification of Mixed-Signal Telecom ICs Ahmed Farid (presenter), Ayman Ahmed, Maged Fikry, Bassam Saadany,

Mapping to Virtex SRLs Nij Dorairaj

Using Model Technology ModelSim and Cadence Concept-HDL for Board-level Simulation Daniel Bethke

An Introduction to the Design Constraint Description Language Tom Dewey

What's New for Verilog 99? Steve Wadsworth (presenter) and Tom Dewey

System On Chip (SOC) Solutions

Selective Net Extraction Methods for ASIC Core Design David Gradin

Analysis of Switched-Capacitor Filters using AccuSim II Elin CHUA (presenter) / Teng-Mong LEE

Electronic Design Automation's Tools in the Laboratories Prof. Lauro de Vilhena Brandƒo Machado Neto

DVM: A Tool for Database Management within the Mentor Graphics Environment David Jones

Puzgen - Characterization of an IC Process Ronnie B. Hunt

Using Continuum for the Verification of Mixed-Signal Circuits Mary Harris

Using Rapid Prototyping to Enhance the Undergraduate VLSI David W. Hyde, Rhonda Kay Gaede (presenter)

Coding complex intersection rules in SVRF John Bartholomew

Dealing with legacy Dracula LVS using 0% as John Bartholomew

EFFECTIVE USE OF ACCUSIM IN NETLIST MODE Erasto M. Kashoro

Mixed Signal Design Flow For Fast Implementation Of SoC Fatehy El-Turky, David C. Lee

OpenMORE Assessment Program for SoC Design and Reuse Verification Pierre Bricaud, Mentor Graphics

IC Design Standards Roadmap Kent Moffat

Open Library API (OLA) Jay Abraham, Si2 Inc.

Board Design Solutions

Can't See The Wood For The Trees? Andrew W. Green

Board Architect - Changing the Process Karen McConnell

Automating the PWB Process Using AMPLE Jim Bergeron

TEAM DESIGN USING BOARD ARCHITECT - LMS Craig Armenti

AP210 and Printed Circuit Board Durability Analysis. Mike Keenan

Streamlining the Output of Schematic Documentation Mary Williams (presenter), John Ruf

Unlocking the Power of Mentor Board Design Tools with New Learning Products Pat Pulis (presenter), John Ruf

Integrating Mechanical and Electrical Design Using the IDF Dave Kehmeier

Standardizing Library Creation and Processes with the Use of Elaine Yost

Breakout Geometries - Problems and solutions Glenn Ball

Applying New Area Fill Technology to Design RF and Shielded Circuits John Ruf

A Panel Comparing and Contrasting Electronics CAD Standards Greg Smith (Boeing - Moderator)

Overview & Tutorial of STEP AP210, Sponsored by PDES, Inc.

Summarization of Results from an ECAD Standards Survey Greg Smith

Simplifying the Use of Standard Placement Spacing Rules Bob Sterrett (presenter), John Ruf

Automatic Geometry Creation Glenn Ball

Using CMS to release Mentor Documentation Rick Rohwer

EDIF Implementation Hilary Kahn

EDIF Overview and Tutorial Hilary Kahn

Redefining Concurrent Layout Greg Dance

Getting the Most Out of Your Service Bureau Robert Chandler

Benefits of Managing Design Stocklists using Parts SpeciaList in Faisal Baquer

GenCAM Implementation Dieter Bergman (IPC) / Dinno Ditta (Router Solutions Inc)

The Technology inside the Geom Genie George Opsahl

Special Tool Focus

Custom Netlisters for Design Architect Jayathi Subramanian (presenter)

Advanced IBIS Modeling Workshop Kim Owen

Software Licensing Robert J. McGaughey

Managing Software Assets - The basic concepts and strategies Rich Mirabella, VP Marketing, GLOBEtrotter Software

Data Extraction from Mentor to Oracle Chuck Rogers

Using ICX to Characterize AGP 4x Systems James C. Bell

Introduction to Dialog Boxes Bruce R. Mayer

Workflow in an Educational Institution and Private Company Jefferson L. Mykolayczky, Leonardo H. Rubira, Alexandre Moeckel and

Web Library Access for Worldwide Data Delivery Tom Anderson (presenter), Karl Kachigan

What is New with QuickSim and QuickSim Pro/Q&A Paul Ree

MILLENIUM DATE ROLLOVER TESTING on SASSO ISOLATED NETWORK Scott Nichols, PE

Using IS for High Speed Backplane Design M. E. Fraeman, A. H. Mattheiss III, J. A. Davis, S. E. Schlemmer

ViewWare - Custom Application Integration Andy Wilcock

Analyzing complex systems using Electrical Board Descriptions Hassan Aboumengel