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PCB Design Data Verification Using Scepter DFF
David Hall
dehall@cfen.honeywell.com
Karen Kerns
klkerns@cfen.honeywell.com
Honeywell Space And Strategic Systems
The PCB design verification process has always been somewhat cumbersome and inefficient, especially in the area of power plane artwork. Our previous method involved copying artwork and drill files to a P.C. running ECAM software. While this method would find some design errors it was unable to do netlist verification or identify copper slivers. This paper describes our new process utilizing the Scepter DFF software. With Scepter we are now able to do a much more thorough job of artwork checking including true artwork to netlist verification, minimum tie widths, insufficient tie to plane, and plane slivers. It has also allowed us to implement aa automated method of identifying and removing airgap and plane slivers inherent in our board designs.
Bio:
David Hall is a Senior CAD Engineer for Honeywell Space And Strategic
Systems in Clearwater, FL. He has been with Honeywell for two years and
has been involved with PCB design and CAD for 20 years. He has used
Mentor Graphics tools for the last 8 years.
Karen Kerns is a Senior CAD Designer for Honeywell Space And Strategic Systems in Clearwater, FL. She has been with Honeywell for 14 years and has been involved with PCB design and CAD for 16 years. She has used Mentor Graphics tools for the last six years.