DSP algorithms often require a large amount of data throughput before the algorithm can be considered completely verified. Workstation-based DSP simulation is often inadequate for complete algorithm checkout because it simply takes too long for simulations that are representative of the real-world application.

A solution to this problem, developed by a Mentor Graphics customer, is to implement the algorithm in a reprogrammable emulation system. This solution uses a Mentor Graphics flow, including architectural synthesis of the DSP algorithm under investigation in Mistral 2, followed by Register-Transfer-Level, VHDL design completion and verification using System Architect and QuickHDL. Autologic-II is used to target Lucent Technology's Orca ATT2C40 FPGAs.These FPGAs are installed on an Aptix emulation circuit card.

This presentation addresses the application of Mentor Graphics products, including the necessary workarounds, used to successfully implement the emulation system.

(Orca is a registered Trademark of Lucent Technologies.)

Bio:
Michael Philippi is a Senior Applications Engineer with Mentor Graphics, based in Schaumburg Illinois. For five years Michael worked in the ASIC design group at Rockwell International Digital Communications Division, supporting the design, verification, manufacture and testing of many ASIC devices. After his experience at Rockwell, Michael designed MPEG-I, digital video decompression ASICs at a small start-up company in the Chicago area, and has spent the last four years as an Applications Engineer,the most recent two years of which, have been with Mentor Graphics. Michael has a Bachelor of Engineering (Electrical) degree from the Queensland Institute of Technology in Brisbane, Australia.