John Jocobson
Intel
Bob Erickson, Andrew Guyler, Paulo Spazzine
Mentor Graphics
With million gate ASICs here and buzz words like "Systems on Silicon" and "System on a Chip" being used, a new breed of tools is needed. Tools to deal with the complex system design problems have been lumped under the heading of "Electronic System Design Automation" (ESDA). In this panel you will hear from users what they think ESDA is and what they think is needed. From Mentor product managers you will hear what Mentor thinks ESDA is and what they have planned.
Bio:
Bob Erickson is the Director of Architecture for the SSD Division of
Mentor Graphics. He has been involved in the development and use of system
design tools since joining Mentor Graphics in 1984. His expertise is in EDA
system architecture and Logic Synthesis. He was named a Mentor Graphics
Technical Fellow in January, 1996.
Paolo Spazzini (MGC)
Andrew Guyler has worked for Mentor Graphics since 1993. Andrew was the engineering manager responsible for introducing QuickVHDL in 1993, and in 1994 he managed the Design For Test engineering team. Since then Andrew has been involved in Synthesis, including floorplanning and links to layout. Currently he manages a team of engineers developing software for AutoLogic II, namely DMAG, Links to Layout, the VHDL and Verilog front end, and netlisters. Andrew has a BSc degree in Mathematics from the University of Nottingham, England, and worked for 10 years plus in GenRad's Design Automation Products division in Fareham, England. Andrew was also a key member of the VHDL 1076-1993 design team, and has continued to be involved in standards activities including VITAL (IEEE 1076.4 ) and Verilog (IEEE 1364).