Automatic Test Pattern Generation (ATPG) will yield powerful productivity gains over the conventional (manual) test pattern generation methods if some simple design guidelines are adhered to. This presentation will provide some guidance to help make designs ATPG friendly. It will also include some useful startup scripts for new users of Mentor Graphics' FlexTest ATPG and QuickFault fault grade tools. If time permits, the presentation will detail how FlexTest and QuickFault, when used together, can be used to isolate dead circuitry in a design.

Bio:
Jim McAlpin has been working as an FPGA/ASIC designer for the National Security Agency since 1985. He has been using CAD tools since 1985 and has been using Mentor Graphics tools since 1991. Jim is currently the Technical Director for V22, the Enabling Technology Laboratory, where he oversees digital system development and development processes. He holds a BSEE degree from Old Dominion University and an MSEE degree from Johns Hopkins University.