1996 Abstracts and Bios by Track

Library Issues

• A Method for Propagating LMS Catalog Changes to Schematics, Michael A. Pringle (abstract and bio)
• Automated Generation of an Intranet (WWW) Electronic Data Book from an LMS Library, Mike Walsh (abstract and bio)
• Automating Compliance to Library Specifications through PDS, Gene Menard (abstract and bio)
• Holding the Keys to Library Migration, Greg Dance, Terry Muskopf (abstract and bio)
• How to Develop Quality Libraries Using PDS, John Wu Qiang, Liau Hon Chung (abstract and bio)
• The Innovation Process Of Board Design and LMS/ MRP System's Interface, Kim Young-Seok, Lee Jong-Yeob (abstract and bio)
• Using the Web as an Effective Librarian Tool, Sam Ingram (abstract and bio)
• Using the Web to Obtain Library Data - eParts and Custom Parts Service, Mark von Pressentin, Claire Wilson (abstract and bio)

PCB

• Controlling the PCB/MCM/Hybrid Manufacturing Process, Steve Klare, Ph.D (abstract and bio)
• Combining system level and board level thermal analysis with AutoTherm, Tom Sturtevant (abstract and bio)
• Customizing Macros, Softkeys and Strokes for Designers and Engineers, Jim Hoch (abstract and bio)
• Embedded Gerber Apertures, MDA Format and RS-274X, Joseph W. Hance (abstract and bio)
• Filling the Gaps in Your Signal Integrity Model Library, Kim L. Owen (abstract and bio)
• High-Speed PCB Design Process, Griffin Derryberry (abstract and bio)
• Managing the Design Cycle, Carl Nielsen (abstract and bio)
• Minimizing the Environmental Impact of Printed Circuit Boards and Assemblies through Smarter Design, C. Kostas, H. M. Karandikar, R. C. White (abstract and bio)
• Packaging from Design Architect, Michael Wallace (abstract and bio)
• Post Processing of Board Station Design Data for EMC/EMI Purposes, Joseph W. Hance (abstract and bio)
• Production of Fabrication Data for Professional Results, Greg Dance (abstract and bio)
• Starting a PWB design from a Non-Mentor Schematic, Bruce R. Mayer (abstract and bio)
• Split Power Planes Without Splitting Headaches, Karen McConnell (abstract and bio)
• Thermal Optimization of Heaters in LTCC for Humidity and Gas Sensors with AutoTherm, Torsten Kirchner (abstract and bio)
• Thermal Resistance -- Don't Sweat It; Using AutoTherm's New Therm_r Calculator for Component Modeling, Rick Cook (abstract and bio)
• Using Interconnect Synthesis Technology for High-Speed Design Dr. Jonathan Weiss, Jacob Ben-Meir (abstract and bio)

IC

• A Generator-based Standard Cell Library using Mentor ICGen, Daniel Linder, Bob Reese (abstract and bio)
• A Simple Model for Managing Complexity, Bob Erickson (abstract and bio)
• Current and Charge Estimation in CMOS Circuits, Sanjay Dhar and Dave J. Gurney (abstract and bio)
• Full-Custom Schematic Design System for Fast SRAM, John Pabst (abstract and bio)
• IC Executive Panel Session, Glenn House (abstract and bio)
• IC File Structure Data Management, King Payne (abstract and bio)
• IC Graph's Engineering Change Order (ECO), Michael Noel (abstract and bio)
• ICGen - An Enabling Technology For High-Density Process-Portable IC Layout, Donald G. Baltus (abstract and bio)
• Optimizing Design Flow Through Resource Sharing of Process Definition Files, Device Generators, and Customized Ample, Michael A. Tedeschi (abstract and bio)
• Post-Layout Wire Optimization for Performance and Reliability, Kei-Yong Khoo, Cheng-Kok Koh, Jason Cong, and Alan Willson (abstract and bio)
• RF IC Layout Solution using the RF Personality Module, Mike Heimlich (abstract and bio)
• Schematic Driven Layout in IC Station, Jeff Hoek (abstract and bio)
• Software Design Management Solutions for a Customized Mentor Graphics Environment, Eric O'Connor (abstract and bio)

ASIC/FPGA

• Accurate Area and Delay Estimation from RTL Descriptions, Arvind Srinivasan (abstract and bio)
• AutoLogicII's Dynamic Micro-Architecture Generator: An Inside View, Ken Steele (abstract and bio)
• Automatic Test Pattern Generation and Grading Jim McAlpin (abstract and bio)
• Constructing the EAIC Architecture: Developing an Externally Asynchronous-Internally Clocked (EAIC) System With the Mentor Graphic's Design Tools Jacob Bell (abstract and bio)
• HDL Simulator Extensions to Support ASIC Sign-Off Requirements, Dennis Brophy (abstract and bio)
• Integrating Synopsys Synthesis in the Mentor Graphics Design Environment, Daniel G. Bethke (abstract and bio)
• Orca(TM)-based FPGA Emulation System for DSPs, Michael Philippi (abstract and bio)
• Panel: What's on the Horizon for ASIC & FPGA from Mentor?, Brian Caslis, Tom Hill, Tom Feist, Cliff Lyons, Steve Shively (abstract and bio)
• Parameterized Generators for Synthesizable Cores Dr. Thomas Cesear (abstract and bio)
• Route Table: Interconnect Delay Modeling In Synthesis, Chuong H. Nguyen (abstract and bio)
• SDF in Quicksim II, Nilgun Mat, Mark Whitley (abstract and bio)
• Single CRAM Solution in Fastscan for RAMs with dIfferent READ and WRITE Data Widths, Rajesh Raina, Charles Njinda, Robert Bailey, Bruce Long, Charlie Beh, Bob Molyneaux (abstract and bio)
• System Design with ESDA Tools, Peter Cairoli (abstract and bio)
• "So you think you're a designer ?", Michael A. Bohm (abstract and bio)
• System Architect to Synopsys Synthesis Integration, Ernie Quantie (abstract and bio)
• System Design and Rapid Prototyping with SDS, C. H. Poskar, R. D. McLeod (abstract and bio)
• Using System Architect in a Heterogeneous EDA Environment, Matthew Wishek (abstract and bio)
• VR-Process Methodology for Systems Design, Wayne Jessop (abstract and bio)
• What is ESDA and What is Mentor Doing?, John Jocobson, Bob Erickson, Andrew Guyler, Paulo Spazzine (abstract and bio)

System Administration/Framework

• A Graphical Tool for Complex EDA Environment Management, J. William Thompson (abstract and bio)
• Building a World-Class CAD Environment, Mark Ledebur (abstract and bio)
• C.1 Compiler Environment, Stephen A. Dum (abstract and bio)
• Customization in AMPLE, Janet K. Petersen (abstract and bio)
• Mentor to Oracle Bill of Material (BOM) Process, Ernie Quantie (abstract and bio)
• Online Documentation Update: 1996 and Beyond, David Gersh (abstract and bio)
• PC-X and WABI --Two Solutions to "1 Machine per Desktop, Bill Bacher (abstract and bio)
• The Anatomy of the Falcon Products Installation, Clinton Wittstruck (abstract and bio)
• The SBD-South Customer Process Validation Program, Linda Adams (abstract and bio)
• Using AMPLE to Parse Data Files, Glenn Ball (abstract and bio)
• X-windows, PCs and the Mentor Environment, Stephen Blair (abstract and bio)

Process Improvement/Workflow

• A Guide to Successfully Implementing WorkXpert, Ross A. Beiler (abstract and bio)
• Concurrent Engineering --One Site's Process, Craig Armenti (abstract and bio)
• Customized Mentor Graphics Tool Training for AlliedSignal Aerospace, Henry Ohlef, Jack Harrity, Andre Mosley (abstract and bio)
• Design Process Analysis and Optimization with WorkXpert, Jay Brockman (abstract and bio)
• Geometry Generator, Mary Anne Jones, Monika Riffle, David Seider (abstract and bio)
• Integration and Interoperability in a Workflow Management Environment, Bill Berg (abstract and bio)
• Manufacturing! The Ultimate Goal, Tom Emmert (abstract and bio)
• Process for Managing Derivative Assemblies, Roger Allison, Leo Dabbs (abstract and bio)
• PWB/PWA Fabrication Drawing Automation, Bill Reynolds (abstract and bio)
• RASSP Enterprise Integration, John Welsh (abstract and bio)
• Simple Ways to Improve Productivity -- Recent MGC User-Friendliness Improvements, Larrye M. Heyl (abstract and bio)
• The RASSP Education and Facilitation Program, Bob Klenke, Anthony Gadient, Jim Aylor, Vijay Madisetti (abstract and bio)
• Tutorial: Technical Process Management using WorkXpert, Rick Reid (abstract and bio)
• Value-Added Additions to WorkXpert to Support Multiple Levels of Process Definition, Gil Alexander (abstract and bio)
• Workflow Management in the Real World, Ron Bishop, Alan Cooper (abstract and bio)
• Workflow Modeling for Implementing Complex, CAD-Based, Design Methodologies, Jeffrey Stavash (abstract and bio)
• WorkXpert Integration: Getting the Most from Your Design Tools Using Coprocess, Marty Fouch (abstract and bio)

University

• A Creative Class Project Based on VHDL, Synthesis and FPGA Design, C. G. Harrison, P. L. Jones (abstract and bio)
• An Evolution of An Electrical Engineering Curriculum: From CAE Fundamentals Towards Concurrent Engineering, Andrzej Rucinski, Frank Hludik (abstract and bio)
• Analog-to-Digital Converter Design for Maximum Resolution, Curt Nelson (abstract and bio)
• Applications of the Mentor Graphic GDT CAD Tool to the Layout of the NPN Transistor in a BiCMOS Process, Xin Liu, Dr. Edwyn Smith (abstract and bio)
• Experiences with the Mosis Design Kit in GDT and ICStation, Vic Nelson (abstract and bio)
• Mentor Graphics Tools in undergraduate IC Design Course, Samiha Mourad (abstract and bio)
• Taking the Tedium Out of Microprocessor System Design Class-Automated PCB Layout, Ralph Stirling (abstract and bio)
• The TOY CPU Project, William D. Richard, David M. Zar (abstract and bio)

Simulation

• DASHT-A Complex Synthesis and Analysis Tool for Structures Applied in Hybrid Technology, Holger Riecke (abstract and bio)
• Designing a 200 Mhz Pentium Pro System: A Signal Integrity and Timing Analysis Case Study, Scott McMorrow (abstract and bio)
• Handling a Single Hierarchical Schematic for Both System Level Simulation And PCB Fabrication, Roland Mercier (abstract and bio)
• Improving Your Design Process by Providing Circuit Simulation Capabilities Within an LMS Library Environment, Mary Harris, Frank Croce (abstract and bio)
• RF Field Simulators and their Coupling with Mentor Graphics' Tools in the DASHT-Project, Torsten Tuschick, Holger Riecke (abstract and bio)
• SDF in Quicksim II, Mark Whitley (abstract and bio)
• Single CRAM Solution in Fastscan for RAMs with Different READ & WRITE Data Widths, Rajesh Raina, Charles Njinda, Robert Bailey, Bruce Long, Charlie Beh, Bob Molyneaux (abstract and bio)

Hardware/Software Codesign

• Integration of Mentor Tools with SimExpress, Shen Zhang, Bill Brown, Richard Seiter (abstract and bio)
• Orca(TM)-based FPGA Emulation System for DSPs, Michael Philippi (abstract and bio)
• Seamless CVE Tutorial, Jim Kenney (abstract and bio)
• SimExpress Experience aka Bull 'Jupiter' Project and the Mentor SimExpress, R. W. Guenthner (abstract and bio)
• Speeding-up Evolvable Hardware Evaluation by Using Emulation Techniques, Vincent Rikkink (abstract and bio)
• Using Embedded Software to Drive ASICs or FPGAs in Simulation, Paul Welton (abstract and bio)